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COE 608

Computer Organization and Architecture

The main topics of the course include basic architecture of modern computers, interaction between computer hardware and software at various levels, and performance evaluation and metrics. Instruction set design, computer arithmetic is also discussed. Data path and control unit design for RISC Processors are covered in detail. The laboratory work includes the design and implementation of a 16-bit RISC CPU using an FPGA development system and VHDL.
Weekly Contact: Lab: 2 hrs. Lecture: 3 hrs.
GPA Weight: 1.00
Course Count: 1.00
Billing Units: 1


CEN 199 and COE 328 and COE 538





Custom Requisites


Mentioned in the Following Calendar Pages

*List may not include courses that are on a common table shared between programs.